CXL: Getting Ready for Take-off
Compute Express Link (CXL) is a new server interconnect that’s going to change computing by allowing memory in different servers to be pooled and shared, by expanding capacity to petabytes, and by making performance, availability, security and mobility composable.
An industry refresh is needed to make CXL a reality. That’s why CXL-compatible processors, memory chips, switches, expanders, and CXL fabric management software are on the way.
On August 2nd, the CXL Consortium and MemVerge hosted a full-day forum titled, “CXL: Getting Ready for Take-off.” The event kicked-off with an update from Siamak Tavallaei, president of the CXL Consortium, and Chief Systems Architect at Google Systems Infrastructure. Siamak was followed by CXL presentations from the world leaders in processors, memory, fabric software, and composable infrastructure.
If you want to find out where the industry is at in unveiling CSL technology, click the button below to peruse 12 slide presentations and 27 videos.
Tuesday Morning at the Santa Clara Convention Center
(Session SPOS-101-1 on the FMS program)
CXL Consortium Update
CXL Compatible Devices Getting Ready to Takeoff
8:30 to 10:50am
Presentations from
Siamak Tavallaei
CXL President
Chief Systems Architect
Google Systems Infrastructure
Willie Nelson
Technology Enabling Architect
Intel
Steve Glaser
Principal Engineer
PCI-SIG Board Member
NVIDIA
Shalesh Thusoo
VP, CXL Product Development
Marvell
Jonathan Prout
Senior Manager, Memory Product Planning
Samsung Electronics
Uksong Kang
Vice President, DRAM Product Planning
SK Hynix
Ryan Baxter
Sr. Director of Marketing
Micron
Tuesday Afternoon at the Santa Clara Convention Center
(Session SPOS-102-1 on the FMS program)
3:20 to 5:40pm
CXL Software Getting Ready to Takeoff
Presentations from
Arvind Jagannath
Product Management
VMware
Charles Fan
CEO & Co-founder
MemVerge
Manoj Wadekar
SW-Defined Memory Workstream Lead
OCP, Storage Architect, Meta
Composable Infrastructure Panel
Siamak Tavallaei
Panel Moderator
President, CXL Consortium
Ben Bolles
Executive Director, Product Management
Liqid
Matt Demas
Field CTO
Giga-IO
Gerry Fan
Founder, CEO
Xconn Technologies
Bernie Wu
VP Strategic Alliances
MemVerge
SaaS and User Panel
Chris Mellor
Editor
Blocks and Files
Manoj Wadekar
SW-Defined Memory Workstream Lead
OCP, Storage Architect, Meta
James Cuff
Distinguished Engineer
Harvard University (retired) Industry Expert, HPC & AI
Richard Solomon
Tech Mktg Mgr., PCIe/CXL
Synopsys
Tuesday, August 2nd
The CXL Forum Playlist on the MemVerge YouTube Channel
Available for viewing at 4:40pm PT
CXL-SSD: Expanding PCIe Storage as Working Memory over CXL
.
Myoungsoo Jung
Associate Professor, KAIST
CAMEL @ KAIST
CXL 2.0-based End-to-end System for High-Performance Memory Disaggregation
Donghyun Gouk
Lead of Computer Architecture and System Group, CAMEL
CAMEL @ KAIST
Enabling CXL Memory Pooling Devices
.
Parag Beeraka
Director of Segment Marketing
ARM
CXL Memory Expansion and Pooling for the Cloud
Casey Morrison
Chief Product Officer and Co-Founder
Astera Labs
Transparent Memory Management for CXL-enabled Systems
Hasan Al Maruf
PhD Candidate
University of Michigan
Transforming the Data Center with CXL
Mark Orthodoxou
VP of Strategic Marketing
Rambus
Introducing CXL Memory Modules (XMMs) for Density and Bandwidth Expansion
Arthur Sainio
Director, Product Marketing
SMART Modular Technologies
XConn CXL Switch Silicon Enabling Composable Data Center Infrastructure
Gerry Fan
CEO & Co-founder
Xconn
Presentation titles and speaker info coming soon from:
