CXL: Getting Ready for Take-off

On August 2nd, The CXL Consortium and MemVerge are hosting a full-day forum at Flash Memory Summit titled, “CXL: Getting Ready for Take-off”.

The forum is a hybrid event consisting of live and virtual presentations, and the goals of the full-day forum are to:

    • Provide a 3600 view of development activity in the CXL ecosystem
    • Accelerate collaboration by sharing information about vendor technology partner programs

The live segment – features presentations and panels in Room F of the Grand Ballroom at the Santa Clara Convention Center. The organizations represented are Blocks and Files, Giga-IO, Intel, Marvell, MemVerge, Liqid, Meta, Micron, NVIDIA, Open Compute Project, SK Hynix, Samsung, Synopsys, VMware, and Xconn.

The virtual segment – consists of a tranche of CXL-related video presentations that will be released on YouTube at 4:40pm on August 2nd. The organizations represented are ARM, Astera Labs,, Hazelcast, Kioxia, Korea Advanced Institute of Science and Technology (KAIST), Lenovo, Montage, NGD Systems, PhoenixNAP, Rambus, Smart Modular, Synopsys, University of Michigan TPP team, and Xconn.

Tuesday Morning at the Santa Clara Convention Center

(Session SPOS-101-1 on the FMS program)

CXL Consortium Update

CXL Compatible Devices Getting Ready to Takeoff

8:30 to 10:50am

Presentations from

Siamak Tavallaei
CXL President
Chief Systems Architect
Google Systems Infrastructure

Willie Nelson
Technology Enabling Architect

Steve Glaser
Principal Engineer
PCI-SIG Board Member

Shalesh Thusoo
VP, CXL Product Development

Jonathan Prout
Senior Manager, Memory Product Planning
Samsung Electronics

Uksong Kang
Vice President, DRAM Product Planning
SK Hynix

Ryan Baxter
Sr. Director of Marketing

Tuesday Afternoon at the Santa Clara Convention Center

(Session SPOS-102-1 on the FMS program)

3:20 to 5:40pm

CXL Software Getting Ready to Takeoff

Presentations from

Arvind Jagannath
Product Management

Charles Fan
CEO & Co-founder

Manoj Wadekar
SW-Defined Memory Workstream Lead
OCP, Storage Architect, Meta

Composable Infrastructure Panel

Siamak Tavallaei
Panel Moderator
President, CXL Consortium

Ben Bolles
Executive Director, Product Management

Matt Demas
Field CTO

Gerry Fan
Founder, CEO
Xconn Technologies

Bernie Wu
VP Strategic Alliances

SaaS and User Panel

Chris Mellor
Blocks and Files

Manoj Wadekar
SW-Defined Memory Workstream Lead
OCP, Storage Architect, Meta

James Cuff
Distinguished Engineer
Harvard University (retired) Industry Expert, HPC & AI

Richard Solomon
Tech Mktg Mgr., PCIe/CXL

Tuesday, August 2nd
The CXL Forum Playlist on the MemVerge YouTube Channel

Available for viewing at 4:40pm PT

CXL-SSD: Expanding PCIe Storage as Working Memory over CXL


Myoungsoo Jung
Associate Professor, KAIST

CXL 2.0-based End-to-end System for High-Performance Memory Disaggregation

Donghyun Gouk
Lead of Computer Architecture and System Group, CAMEL

Enabling CXL Memory Pooling Devices


Parag Beeraka
Director of Segment Marketing

CXL Memory Expansion and Pooling for the Cloud

Casey Morrison
Chief Product Officer and Co-Founder
Astera Labs

Transparent Memory Management for CXL-enabled Systems

Hasan Al Maruf
PhD Candidate
University of Michigan

Transforming the Data Center with CXL

Mark Orthodoxou
VP of Strategic Marketing

Introducing CXL Memory Modules (XMMs) for Density and Bandwidth Expansion

Arthur Sainio
Director, Product Marketing
SMART Modular Technologies

XConn CXL Switch Silicon Enabling Composable Data Center Infrastructure

Gerry Fan
CEO & Co-founder

Presentation titles and speaker info coming soon from: